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CY7C1061DV33: 16-Mbit (1 M × 16) Static RAM | Cypress Semiconductor

CY7C1061DV33: 16-Mbit (1 M × 16) Static RAM

Last Updated: 
Dec 05, 2016
Version: 
*K

16-Mbit (1 M × 16) Static RAM

Features

  • High speed
    • tAA = 10 ns
  • Low active power
    • ICC = 175 mA at 100 MHz
  • Low CMOS standby power
    • ISB2 = 25 mA
  • Operating voltages of 3.3 ± 0.3 V
  • 2.0 V data retention
  • Automatic power down when deselected
  • TTL compatible inputs and outputs
  • Easy memory expansion with CE1 and CE2 features
  • Available in Pb-free 54-pin TSOP II and 48-ball VFBGA packages
  • Offered in single CE and dual CE options

Functional Description

The CY7C1061DV33 is a high performance CMOS Static RAM organized as 1,048,576 words by 16 bits.

To write to the device, take Chip Enables (CE1 LOW and CE2 HIGH) and Write Enable (WE) input LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A19). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A19).