You are here

RoboClock® CY7B9950: 2.5 / 3.3 V, 200 MHz High Speed Multi-Phase PLL Clock Buffer | Cypress Semiconductor

RoboClock® CY7B9950: 2.5 / 3.3 V, 200 MHz High Speed Multi-Phase PLL Clock Buffer

Last Updated: 
Nov 15, 2016
Version: 
*K

2.5 / 3.3 V, 200 MHz High Speed Multi-Phase PLL Clock Buffer

Features

  • 2.5 V or 3.3 V operation
  • Split output bank power supplies
  • Output frequency range: 6 MHz to 200 MHz
  • 50 ps typical matched-pair output-output skew
  • 50 ps typical cycle-cycle jitter
  • 49.5 / 50.5% typical output duty cycle
  • Selectable output drive strength
  • Selectable positive or negative edge synchronization
  • Eight LVTTL outputs driving 50Ω terminated lines
  • For more, see pdf

Description

The CY7B9950 RoboClock® is a low voltage, low power, eight-output, 200 MHz clock driver. It features output phase programmability which is necessary to optimize the clock tree design of high performance computer and communication systems.