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CY62167G, CY62167GE MoBL®: 16-Mbit (1 M words × 16 bit / 2 M words × 8 bit) Static RAM with Error-Correcting Code (ECC) | Cypress Semiconductor

CY62167G, CY62167GE MoBL®: 16-Mbit (1 M words × 16 bit / 2 M words × 8 bit) Static RAM with Error-Correcting Code (ECC)

Last Updated: 
Jun 14, 2017
Version: 
*P
CY62167G and CY62167GE are high-performance CMOS, low-power (MoBL®) SRAM devices with embedded ECC.
  • Ultra-low standby current
    • Typical standby current: 5.5 μA
    • Maximum standby current: 16 μA
  • High speed: 45 ns / 55 ns
  • Embedded error-correcting code (ECC) for single-bit error correction
  • Wide voltage range: 1.65 V to 2.2 V, 2.2 V to 3.6 V, and 4.5 V to 5.5 V
  • 1.0-V data retention
  • Transistor-transistor logic (TTL) compatible inputs and outputs
  • Error indication (ERR) pin to indicate 1-bit error detection and correction
  • 48-pin TSOP I package configurable as 1 M × 16 or 2 M × 8 SRAM
  • Available in Pb-free 48-ball VFBGA and 48-pin TSOP I packages

Functional Description

CY62167G and CY62167GE are high-performance CMOS, low-power (MoBL®) SRAM devices with embedded ECC. Both devices are offered in single and dual chip enable options and in multiple pin configurations. The CY62167GE device includes an ERR pin that signals a single-bit error-detection and correction event during a read cycle.

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