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CY2XL12: Low RMS Phase Jitter Programmable LVDS Clock Generator | Cypress Semiconductor

CY2XL12: Low RMS Phase Jitter Programmable LVDS Clock Generator

Last Updated: 
Oct 04, 2016
Version: 
*E

Low RMS Phase Jitter Programmable LVDS Clock Generator

Features

  • Programmable LVDS clock generator
  • Low RMS Phase Jitter
  • Available output frequencies: 50 MHz to 700 MHz
  • Package: Pb-free 8-pin thin shrunk small outline package (TSSOP)
  • Supply voltage: 3.3 V or 2.5 V
  • Temperature: Industrial

Functional Description

The CY2XL12 is a phase locked loop (PLL)-based high-performance clock generator that uses Cypress’s low-noise voltage control oscillator (VCO) technology to achieve less than 1 ps typical RMS phase jitter. The CY2XL12 uses an external crystal reference input and drives one LVDS output pair having programmable drive strength. CY2XL12 can be programmed as Output Enable (OE), or Power Down (PD#), or Frequency Select (FS) device by configuring the pin 5. The device can be programmed either to operate at 3.3 V or at 2.5 V.