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CY2DP814: 1:4 Clock Fanout Buffer | Cypress Semiconductor

CY2DP814: 1:4 Clock Fanout Buffer

Last Updated: 
Aug 24, 2015

1:4 Clock Fanout Buffer


  • Low-voltage operation
  • VDD = 3.3V
  • 1:4 fanout
  • Single input configurable for LVDS, LVPECL, or LVTTL
  • Four differential pairs of LVPECL outputs
  • Drives 50-ohm load
  • Low input capacitance
  • Less than 4 ns typical propagation delay
  • 85 ps typical output-to-output skew
  • Commercial temperature range
  • Available in TSSOP package


The Cypress CY2 series of network circuits are produced using advanced 0.35-micron CMOS technology, achieving the industry’s fastest logic.

The Cypress CY2DP814 fanout buffer features a single LVDSor a single LVPECL-compatible input and four LVPECL output pairs.