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CY23FS08: Failsafe™ 2.5 V/3.3 V Zero Delay Buffer | Cypress Semiconductor

CY23FS08: Failsafe™ 2.5 V/3.3 V Zero Delay Buffer

Last Updated: 
Jun 19, 2016

Failsafe™ 2.5V/3.3V Zero Delay Buffer


  • Internal DCXO for continuous glitch-free operation
  • Zero input-output propagation delay
  • 100 ps typical output cycle-to-cycle jitter
  • 110 ps typical output-output skew
  • 1 MHz to 200 MHz reference input
  • Supports industry standard input crystals
  • 200 MHz (commercial), 166 MHz (industrial) outputs
  • 5V-tolerant inputs
  • Phase-locked loop (PLL) bypass mode
  • For more, see pdf

Functional Description

The CY23FS08 is a FailSafe™ Zero Delay Buffer with two reference clock inputs and eight phase-aligned outputs. The device provides an optimum solution for applications where continuous operation is required in the event of a primary clock failure.