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CY14V101LA, CY14V101NA: 1-Mbit (128 K × 8/64 K × 16) nvSRAM | Cypress Semiconductor

CY14V101LA, CY14V101NA: 1-Mbit (128 K × 8/64 K × 16) nvSRAM

Last Updated: 
Aug 15, 2016

1-Mbit (128 K × 8/64 K × 16) nvSRAM


  • 25 ns and 45 ns access times
  • Internally organized as 128 K x 8 (CY14V101LA) or 64 K x 16 (CY14V101NA)
  • Hands off automatic STORE on power down with only a small capacitor
  • STORE to QuantumTrap nonvolatile elements initiated by software, device pin, or AutoStore on power down
  • RECALL to SRAM initiated by software or power up
  • Infinite read, write, and recall cycles
  • 1 million STORE cycles to QuantumTrap
  • 20 year data retention
  • Core VCC = 3.0 V to 3.6 V; I/O VCCQ = 1.65 V to 1.95 V
  • Industrial temperature
  • 48-ball fine pitch ball grid array (FBGA) package
  • Pb-free and restriction of hazardous substances (RoHS) compliance

Functional Description

The Cypress CY14V101LA/CY14V101NA is a fast static RAM, with a non-volatile element in each memory cell. The memory is organized as 128 K bytes of 8 bits each or 64 K words of 16 bits each. The embedded non-volatile elements incorporate QuantumTrap technology, producing the world’s most reliable non-volatile memory. The SRAM provides infinite read and write cycles, while independent non-volatile data resides in the highly reliable QuantumTrap cell. Data transfers from the SRAM to the non-volatile elements (the STORE operation) takes place automatically at power down. On power-up, data is restored to the SRAM (the RECALL operation) from the non-volatile memory. Both the STORE and RECALL operations are also available under software control.

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