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CY14MB064J1A, CY14MB064J2A, CY14ME064J1A, CY14ME064J2A: 64-Kbit (8 K × 8) Serial (I2C) nvSRAM | Cypress Semiconductor

CY14MB064J1A, CY14MB064J2A, CY14ME064J1A, CY14ME064J2A: 64-Kbit (8 K × 8) Serial (I2C) nvSRAM

Last Updated: 
Nov 20, 2015


  • 64-Kbit nonvolatile static random access memory (nvSRAM)
    Internally organized as 8 K × 8
    • STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using I2C command (Software STORE)
    • RECALL to SRAM initiated on power-up (Power-Up RECALL) or by I2C command (Software RECALL)
    • Automatic STORE on power-down with a small capacitor (except for CY14MX064J1A)
  • High reliability
    • Infinite read, write, and RECALL cycles
    • 1 million STORE cycles to QuantumTrap
    • Data retention: 20 years at 85 °C
  • High speed I2C interface
    • Industry standard 100 kHz and 400 kHz speed
    • Fast-mode Plus: 1 MHz speed
    • High speed: 3.4 MHz
    • Zero cycle delay reads and writes
  • Write protection
    • Hardware protection using Write Protect (WP) pin
    • Software block protection for 1/4, 1/2, or entire array
  • I2C access to special functions
    • Nonvolatile STORE/RECALL
    • 8 byte serial number
    • Manufacturer ID and Product ID
    • Sleep mode
  • Low power consumption
    • Average active current of 1 mA at 3.4-MHz operation
    • Average standby mode current of 120 μA
    • Sleep mode current of 8 μA
  • Industry standard configurations
    • Operating voltages:
      • CY14MB064J: VCC = 2.7 V to 3.6 V
      • CY14ME064J: VCC = 4.5 V to 5.5 V
    • Industrial temperature
    • 8-pin small outline integrated circuit (SOIC) package
    • Restriction of hazardous substances (RoHS) compliant


The Cypress CY14MX064J combines a 64-Kbit nvSRAM with a nonvolatile element in each memory cell. The memory is organized as 8 K words of 8 bits each. The embedded nonvolatile elements incorporate the QuantumTrap technology, creating the world’s most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while the QuantumTrap cells provide highly reliable nonvolatile storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place automatically at power-down (except for CY14MX064J1A). On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation). The STORE and RECALL operations can also be initiated by the user through I2C commands.

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