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CY14B116L, CY14B116N, CY14B116S, CY14E116L, CY14E116N, CY14E116S: 16-Mbit (2048 K × 8/1024 K × 16/512 K × 32) nvSRAM | Cypress Semiconductor

CY14B116L, CY14B116N, CY14B116S, CY14E116L, CY14E116N, CY14E116S: 16-Mbit (2048 K × 8/1024 K × 16/512 K × 32) nvSRAM

Last Updated: 
Sep 08, 2016


  • 16-Mbit nonvolatile static random access memory (nvSRAM)
    • 25-ns, 30-ns and 45-ns access times
    • Internally organized as 2048 K × 8 (CY14X116L), 1024 K × 16 (CY14X116N), 512 K × 32 (CY14X116S)
    • Hands-off automatic STORE on power-down with only a small capacitor
    • STORE to QuantumTrap nonvolatile elements is initiated by software, device pin, or AutoStore on power-down
    • RECALL to SRAM initiated by software or power-up
  • High reliability
    • Infinite read, write, and RECALL cycles
    • 1 million STORE cycles to QuantumTrap
    • Data retention: 20 years
  • Sleep mode operation
  • Low power consumption
    • Active current of 75 mA at 45 ns
    • Standby mode current of 650 μA
    • Sleep mode current of 10 μA
  • Operating voltages:
    • CY14B116X: VCC = 2.7 V to 3.6 V
    • CY14E116X: VCC = 4.5 V to 5.5 V
  • Industrial temperature: –40 °C to +85 °C
  • Packages
    • 44-pin thin small-outline package (TSOP II)
    • 48-pin thin small-outline package (TSOP I)
    • 54-pin thin small-outline package (TSOP II)
    • 60-ball fine-pitch ball grid array (FBGA) package
    • 165-ball fine-pitch ball grid array (FBGA) package
  • Restriction of hazardous substances (RoHS) compliant
  • Offered speeds
    • 44-pin TSOP II: 25 ns and 45 ns
    • 48-pin TSOP I: 30 ns and 45 ns
    • 54-pin TSOP II: 25 ns and 45 ns
    • 60-ball FBGA: 25 ns
    • 165-ball FBGA: 25 ns and 45 ns

Functional Description

The Cypress CY14X116L/CY14X116N/CY14X116S is a fast SRAM, with a nonvolatile element in each memory cell. The memory is organized as 2048 K bytes of 8 bits each or 1024 K words of 16 bits each or 512 K words of 32 bits each. The embedded nonvolatile elements incorporate QuantumTrap technology, producing the world’s most reliable nonvolatile memory. The SRAM can be read and written an infinite number of times. The nonvolatile data residing in the nonvolatile elements do not change when data is written to the SRAM. Data transfers from the SRAM to the nonvolatile elements (the STORE operation) takes place automatically at power-down. On power-up, data is restored to the SRAM (the RECALL operation) from the nonvolatile memory. Both the STORE and RECALL operations are also available under software control.

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