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CY14B101Q1, CY14B101Q2, CY14B101Q3: 1-Mbit (128 K × 8) Serial SPI nvSRAM | Cypress Semiconductor

CY14B101Q1, CY14B101Q2, CY14B101Q3: 1-Mbit (128 K × 8) Serial SPI nvSRAM

Last Updated: 
Aug 26, 2015

1-Mbit (128 K × 8) Serial SPI nvSRAM


  • 1 Mbit nonvolatile static random access memory (nvSRAM)
    • Internally organized as 128 K x 8
    • STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by user using HSB pin (Hardware STORE) or SPI instruction (Software STORE)
    • RECALL to SRAM initiated on power-up (Power-Up RECALL) or by SPI instruction (Software RECALL)
    • Automatic STORE on power-down with a small capacitor (except for CY14B101Q1)
  • High reliability
    • Infinite read, write, and RECALL cycles
    • 1 million STORE cycles to QuantumTrap
    • Data retention: 20 years
  • For more, see pdf

Functional Overview

The Cypress CY14B101Q1/CY14B101Q2/CY14B101Q3 combines a 1-Mbit nvSRAM with a nonvolatile element in each memory cell with serial SPI interface. The memory is organized as 128 K words of 8 bits each. The embedded nonvolatile elements incorporate the QuantumTrap technology, creating the world’s most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while the QuantumTrap cell provides highly reliable nonvolatile storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place automatically at power-down (except for CY14B101Q1). On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation). Both STORE and RECALL operations can also be initiated by the user through SPI instruction.

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