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CY14B101LA, CY14B101NA: 1-Mbit (128 K × 8/64 K × 16) nvSRAM | Cypress Semiconductor

CY14B101LA, CY14B101NA: 1-Mbit (128 K × 8/64 K × 16) nvSRAM

Last Updated: 
Sep 18, 2015


  • 20 ns, 25 ns, and 45 ns access times
  • Internally organized as 128 K × 8 (CY14B101LA) or 64 K × 16 (CY14B101NA)
  • Hands off automatic STORE on power-down with only a small capacitor
  • STORE to QuantumTrap nonvolatile elements initiated by software, device pin, or AutoStore on power-down
  • RECALL to SRAM initiated by software or power-up
  • Infinite read, write, and RECALL cycles
  • 1 million STORE cycles to QuantumTrap
  • 20 year data retention
  • Single 3 V +20% to –10% operation
  • Industrial temperature
  • Packages
    • 32-pin small-outline integrated circuit (SOIC)
    • 44-/54-pin thin small outline package (TSOP) Type II
    • 48-pin shrink small-outline package (SSOP)
    • 48-ball fine-pitch ball grid array (FBGA)
  • Pb-free and restriction of hazardous substances (RoHS) compliant

Functional Description

The Cypress CY14B101LA/CY14B101NA is a fast static RAM (SRAM), with a nonvolatile element in each memory cell. The memory is organized as 128 K bytes of 8 bits each or 64 K words of 16 bits each. The embedded nonvolatile elements incorporate QuantumTrap technology, producing the world’s most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while independent nonvolatile data resides in the highly reliable QuantumTrap cell. Data transfers from the SRAM to the nonvolatile elements (the STORE operation) takes place automatically at power-down. On power-up, data is restored to the SRAM (the RECALL operation) from the nonvolatile memory. Both the STORE and RECALL operations are also available under software control.

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