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Analog Net Constraint (Cy_Net_Constraint) | Cypress Semiconductor

Analog Net Constraint (Cy_Net_Constraint)

Last Updated: 
Dec 22, 2015
Symbol Diagram
  • Limits analog routing of a signal to a specific routing resource
  • All terminals on the signal must connect directly to the routing resource

Note: Routing is strict. All of the devices connected to the net with the resource constraint must have a direct hardware connection to the resource. Refer to the Analog Routing Diagram in the applicable Technical Reference Manual (TRM), which is available from the Cypress website, If the resources do not have a hardware connection to the specified constraint, an error will occur.

General Description

The Analog Net Constraint component allows you to define the route of the analog signal to which it is connected. This is an advanced feature that is not needed for most designs, and should be used with caution.

Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.