CE95387 - Trim And Margin Code Example With PSoC® 3/PSoC 5LP | Cypress Semiconductor
CE95387 - Trim And Margin Code Example With PSoC® 3/PSoC 5LP
This code example shows how the Trim and Margin Component runs on PSoC® 3 and PSoC 5LP devices. It is intended for use with the CY8CKIT-030 PSoC 3 Development Kit (DVK) or CY8CKIT-050 PSoC 5LP DVK and the CY8CKIT-035 PSoC Power Supervision Expansion Board Kit (EBK). The example project consists of the Trim and Margin, Power Monitor, Status Register, Control Register, and Character LCD Components.
The Power Monitor Component is configured to monitor the output voltages of the four power converters installed on the CY8CKIT-035 board for display on the LCD. The Trim and Margin Component is used to adjust the power converter output voltages by pressing the two switches on the DVK. These switches are also used to turn off/on the power converters. The Control Register Component is used to control the power-up sequence of the power converters. The Character LCD Component displays the measured and desired voltage for the selected rail. It also displays the current duty cycle of the internal Trim and Margin Component’s PWM of the selected rail.