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CE95273 - Delta Sigma ADC in single-ended mode using DMA and VDAC with PSoC 3/5LP | Cypress Semiconductor

CE95273 - Delta Sigma ADC in single-ended mode using DMA and VDAC with PSoC 3/5LP

Last Updated: 
Aug 28, 2017
Version: 
*A

This code example shows the usage of DMA with ADC and VDAC components. The ADC is configured in default single ended mode. The ADC EOC signal is connected to DRQ input of DMA. On each rising edge of EOC signal, ADC output is transferred to VDAC input register. VDAC converts this digital value to analog signal which can be measured using a multimeter.