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CE209975 - Clock Buffer with Smart IO® | Cypress Semiconductor

CE209975 - Clock Buffer with Smart IO®

Last Updated: 
Jul 28, 2016

This example shows how to use a Smart IO® Component in PSoC® 4 to implement a clock buffer that can operate in chip low power modes. It can also be used to drive a heavier load than one GPIO is rated for by replicating the signal and driving two pins.


This code example demonstrates how an off-chip signal can be replicated using the Smart IO LUTs to drive a heavier load, while operating in chip deep-sleep mode. It also demonstrates how several signals may be logically operated on to generate a signal that triggers a wakeup event through the port interrupt.