AN94074 - Design Best Practices with CY27410 | Cypress Semiconductor
AN94074 - Design Best Practices with CY27410
AN94074 provides basic design guidelines of CY27410 for the best performance in end systems. You should use this best practices guidance in conjunction with all other design, manufacturing, and software guidelines applicable to CY27410.
CY27410 is a four-PLL spread-spectrum clock generator that generates eight differential and four single ended clock outputs up to 700 MHz with sub-picosecond jitter. This document outlines the architecture of CY27410 and provides design guidelines for best performance in end systems. This document also contains a case study that illustrates how CY27410 can be used to meet a sample clocking requirement.