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AN93892 - Solving PCI Express Timing Challenges with CY27410 | Cypress Semiconductor

AN93892 - Solving PCI Express Timing Challenges with CY27410

Last Updated: 
Sep 12, 2017
Version: 
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AN93892 introduces Cypress’s latest CY27410 clock device that solves timing challenges of PCI Express interfacing. The device can generate eight differential and four single-ended clock outputs up to 700 MHz with subpicosecond jitter. From a high-speed system design point of view, CY27410 simplifies the clock-buffering scheme, where a single clock source can be fanned out to multiple PCI Express inputs in multifunction module systems.

Introduction

Cypress’s latest generation four-PLL clock device CY27410 is ideal for PCI Express (PCIe)-based multifunction module systems. CY27410 can generate eight differential and four single-ended clock outputs at up to 700 MHz with sub-picosecond jitter.

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