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AN81623 - PSoC(R) 3, PSoC 4, and PSoC 5LP Digital Design Best Practices | Cypress Semiconductor

AN81623 - PSoC(R) 3, PSoC 4, and PSoC 5LP Digital Design Best Practices

Last Updated: 
Jul 10, 2017
Version: 
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AN81623 gives a brief introduction to the digital hardware design theory and then describes the powerful and highly flexible digital subsystems in PSoC 3, PSoC 4 (4200 family), and PSoC 5LP. It describes best practices for digital design using PSoC Creator, and shows how to use static timing analysis (STA) report files.
Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.