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AN74875 - Designing with Serial I2C nvSRAM | Cypress Semiconductor

AN74875 - Designing with Serial I2C nvSRAM

Last Updated: 
Nov 20, 2015

A typical I2C single master-multi slave configuration is shown in the following diagram.

This application note provides a few example circuits, design guidelines, and PSoC®3 based sample code snippets to help users understand and design with Cypress I2C nvSRAM.

An "I2C nvRAM" component library is also created using Cypress PSoC®3 device as a reference design project and attached to this Application Note. The PSoC®3 component library configures Cypress PSoC®3 device as a standard I2C master controller and also provides the list of APIs which can directly be called in an application firmware to access the I2C nvSRAM functions.

Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.