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AN73503 - PSoC® USB HID Bootloader | Cypress Semiconductor

AN73503 - PSoC® USB HID Bootloader

Last Updated: 
Jul 27, 2016
This application note describes how to implement a USB bootloader for PSoC 3 and PSoC 5LP devices by using the USB Human Interface Device (HID) class.

Bootloaders are a common part of MCU system design. A bootloader makes it possible for a product's firmware to be updated in the field. At the factory, initial programming of firmware into a product is typically done through the MCU’s Joint Test Action Group (JTAG) or Serial Wire Debugger (SWD) interface. However, these interfaces are usually not available in the field.

This is where bootloading comes in. Bootloading enables system firmware upgrade over a standard communication interface such as USB or I2C. A bootloader communicates with a host to get new application code or data, and writes it into the device’s flash memory.

In this application note you will learn how to: 

  • Add a USB bootloader to a PSoC 3, PSoC 4 L-series, or PSoC 5LP device
  • Prepare an application project for bootloading
  • Use the bootloader host program provided with PSoC Creator
  • Create your own Windows-based bootloader host program

This application note assumes that you are familiar with PSoC and the PSoC Creator IDE. If you are new to PSoC, you can find introductions in the Getting Started with PSoC application notes AN54181, AN79953, and AN77759. If you are new to PSoC Creator, see the PSoC Creator home page.

This application note also assumes that you are familiar with bootloader concepts. If you are new to these concepts, see application note AN73854, PSoC Introduction to Bootloaders.

Finally, this application note assumes that you are familiar with USB. If you are new to USB or the USB HID class, see application notes AN57294, USB 101: An Introduction to Universal Serial Bus 2.0 or AN57473, USB HID Basics with PSoC.

Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.