AN61345 - Designing with EZ-USB® FX2LP™ Slave FIFO Interface | Cypress Semiconductor
AN61345 - Designing with EZ-USB® FX2LP™ Slave FIFO Interface
Sep 27, 2017
Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.
|File Title||Language||Size||Last Updated|
|AN61345 Designing with EZ-USB® FX2LP™ Slave FIFO Interface.pdf||English||1.39 MB||05/10/2017|
|AN61345 Designing With EZ-USB FX2LP Slave FIFO Interface - Source code.zip||English||3.5 MB||08/31/2015|
|AN61345 - Designing With EZ-USB® FX2LP Slave FIFO Interface.pdf||Chinese||2.12 MB||09/11/2017|
|AN61345 - Designing with EZ-USB(R) FX2LP(TM) Slave FIFO Interface (Japanese).pdf||Japanese||1.63 MB||09/27/2017|
Need help? Ask a question and find answers in the Cypress Developer Community Forums.
Low/intermittent bandwidth users tip: Firefox and Chrome browsers will allow downloads to be resumed if your connection is lost during download.
|USB Hi-Speed Code Examples||03/29/2016|
|CY3684 EZ-USB FX2LP Development Kit||08/30/2018|
|AN63620 - Configuring a Xilinx Spartan-3E FPGA Over USB Using EZ-USB FX2LP™||07/07/2016|