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AN54460 - PSoC® 3 and PSoC 5LP Interrupts | Cypress Semiconductor

AN54460 - PSoC® 3 and PSoC 5LP Interrupts

Last Updated: 
May 10, 2017
Version: 
*H

AN54460 explains the interrupt architecture in PSoC® 3 and PSoC 5LP, and its configuration in PSoC Creator™ IDE with the help of example projects. Advanced interrupt topics such as handling re-entrant functions, interrupt code optimization, interrupt latency, and debug techniques are also explained.

Important Note: From version *G and above of this application note, the PSoC 4 content in the earlier versions of this application note has been moved to the dedicated PSoC 4 application note – AN90799 - PSoC® 4 Interrupts. From version *G and above, this application note covers only PSoC 3 and PSoC 5LP devices.

Introduction

Interrupts are an important part of any embedded application. They free the CPU from having to continuously poll for the occurrence of a specific event and, instead, notify the CPU only when that event occurs. In system-on-chip (SoC) architectures such as PSoC, interrupts are frequently used to communicate the status of on-chip peripherals to the CPU.

Video

The below video provides a walkthrough of basics of PSoC 3, PSoC 5LP Interrupt architecture. It demonstrates how the PSoC Creator software supports Interrupts by using a simple example project.

 

Compatibility Matrix

The following table indicates the PSoC devices, PSoC Creator versions, compilers, and development kits that will work with this application note project:

Project Device PSoC Creator
Version
Development Kit
CY8CKIT-xxx
Architecture Silicon
Revision
V3.0 SP1 or
higher
V3.0 or
lower
001
DVK
030/050
DVK
AN54460.zip PSoC3 Prod YES NO YES YES*
PSoC5LP Prod YES NO YES YES*

* Refer to Migrating CY8CKIT-001 DVK project to CY8CKIT 030/ 050.

Projects associated with this application note can be downloaded from the ‘Related Files’ section below.

Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.