You are here

AN4011 - Choosing The Right Cypress Synchronous SRAM | Cypress Semiconductor

AN4011 - Choosing The Right Cypress Synchronous SRAM

Last Updated: 
Aug 02, 2017
Version: 
*J

AN4011 provides an overview of Standard Synchronous, NoBL, QDR®-II/II+, QDR-II+ Xtreme, DDR-II/II+, DDR-II+ Xtreme and QDR-IV SRAM's. Cypress currently manufactures several major Synchronous SRAM architectures. The purpose of this application note is to provide a means to determine which architecture is right for a particular application. A brief description of each architecture and comparison by address/data relationships and performance characteristics is also included.

The purpose of this application note is to provide a means to determine which architecture is right for a particular application. A brief description of each architecture and comparison by address/data relationships and performance characteristics is also included.

The table below shows the architecture comparison for the different options:                                                                            

Parameter Std. Sync NoBLTM DDR-II/DDR-II+ QDRTM-II/ QDRTM-II+
Data Rate Single Single Double Double
Data Bus Common I/O Common I/O Common and Separate I/O Separate I/O
VDD 3.3V/2.5V 3.3V/2.5V 1.8V 1.8V
VDDQ LVTTL 3.3V/2.5V LVTTL 3.3V/3.5V HSTL (1.5V/1.8V) HSTL (1.5V/1.8V)
Clock Frequency 250 MHz 250 MHz 333 MHz / 550 MHz 333 MHz / 550 MHz
Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.