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AN32200 - PSoC® 1 - Clocks and Global Resources | Cypress Semiconductor

AN32200 - PSoC® 1 - Clocks and Global Resources

Last Updated: 
May 04, 2017
Version: 
*F

PSoC® 1 has a variety of programmable parameters affecting its functionality. AN32200 explains each parameter under the Global Resources, the relevance of each parameter to the operation of the device, points to remember while configuring these parameters, registers that affect the parameters, and code snippets to change these parameters during runtime.

Introduction

Understanding the global parameters and clocks is required for effective utilization of the unique features of PSoC. PSoC has a variety of programmable parameters affecting its functionality. A lot of these are captured under the Global Resources parameters settings in PSoC Designer™ – System Clock (SysClk), CPU Clock, Programmable Clocks, Reference Generator, LVD threshold, and Switch Mode Pump, to name a few. A clear understanding of the different global parameters gives the user more resourceful options in a design.

This app note provides a detailed description of the different global resources available in PSoC. There is an elaborate discussion on clock resources like SysCLK, SysCLKx2, VC1, VC2, VC3 and the CLK32kHz, analog resources like Reference selection, Reference power etc and system resources like LVD, SMP and Watchdog timer.
 

Example Project

Supported H/W and S/W
Supported PSoC1 Devices
PSoC Designer Version H/W Kit CY8C20xxx CY8C21xxx CY8C22xxx CY8C23xxx CY8C24xxx CY8C27xxx CY8C28xxx CY8C29xxx
No 5.0 or newer N/A   x23, x34  x45   x23A, x94 x43 x03, x13, x23, x33, x43, x45 and x52 x66