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AN47864 - Interfacing TI OMAPV1030 Processor to Astoria's Pseudo-NAND Processor Port | Cypress Semiconductor

AN47864 - Interfacing TI OMAPV1030 Processor to Astoria's Pseudo-NAND Processor Port

Last Updated: 
Nov 23, 2015
Version: 
*C
This is an Obsolete Application Note
The document AN47864 - Interfacing TI OMAPV1030 Processor to Astoria's Pseudo-NAND Processor Port has been marked as obsolete. The obsolete version of this application note is still available with the below description but may not be complete or valid any longer. If you have any questions or require support in regards to the below application note content, please click here and create a technical support case.

Cypress West Bridge(R) Astoria provides high speed USB peripheral and mass storage control capabilities to the system processor through its host processor port. This application note presents a physical interconnect example of interfacing the TI OMAPV1030 baseband processor to Astoria device, using Astoria's Pseudo-NAND Processor Port interface.