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AN44001 - Finite State Machine in PSoC® Designer™ | Cypress Semiconductor

AN44001 - Finite State Machine in PSoC® Designer™

Last Updated: 
Nov 23, 2015
Version: 
*B
This is an Obsolete Application Note
The document AN44001 - Finite State Machine in PSoC® Designer™ has been marked as obsolete. The obsolete version of this application note is still available with the below description but may not be complete or valid any longer. If you have any questions or require support in regards to the below application note content, please click here and create a technical support case.

The finite state machine is a powerful construct, suitable for implementation of the algorithms required for today’s embedded designs. The PSoC Designer™ System Level Design State Machine transfer function is a well architected, efficient, and verified state machine engine that allows you to easily create a flexible state machine. You can define states and transition events in a graphical environment and the tool generates the code. This application note provides a brief overview of the state machine fundamentals and discusses how to use the PSoC Designer™ System Level Design tool to create a state machine and integrate it into your design. The example project demonstrates many of the ideas presented.