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Enclustra Mars FPGA USB 3.0 Evaluation Kits - From Enclustra FPGA Solutions | Cypress Semiconductor

Enclustra Mars FPGA USB 3.0 Evaluation Kits - From Enclustra FPGA Solutions

Last Updated: 
Mar 15, 2015

 
Enclustra FPGA Solutions
1 Technopark Rd.
Zurich, CH 8005
Switzerland
  Features  
 
  • Cypress EZ-USB FX3 USB 3.0 device controller
  • 350+ MB/sec upstream data transfer rate over USB 3.0 with selected hosts
  • Available with Enclustra’s Mars family of SO-DIMM sized FPGA modules featuring a Xilinx FPGA (Spartan-6, Artix-7)
  • FMC low pin count connector and optional 40-pin I/O header
  • High performance DDR2 or DDR3 memory
  • Flash storage for FPGA bitstream and EZ-USB FX3 firmware.
  • Gigabit Ethernet port
  • Reference design implementing streaming data transfer between FPGA and host PC (upstream & downstream)
  • Available in commercial and industrial temperature grade
 
     

  Description  
 

The Mars FX3 kits contain everything that a developer needs to implement an efficient streaming data transfer between a FPGA and a Windows 7 based host PC including hardware, software and firmware.

The kits are available with a Xilinx FPGA (Spartan-6, Artix-7) hosted on one of Enclustra’s Mars family of SO-DIMM sized FPGA modules.

The Mars PM3 carrier board hosts Cypress EZ-USB FX3 device controller CYUSB3014-BZXI. The compact p-ITX sized board runs off a 12V DC power supply and contains a FMC LPC connector (FPGA mezzanine card, low pin count).

The GPIF II port is used as the connection between the FPGA and the Cypress EZ-USB FX3 USB 3.0 device controller. The reference design uses the Slave FIFO mode in the 32 bit mode at up to 100 MHz.

The Mars FX3 kits are equally well suited for rapid prototyping and for building low-quantity FPGA systems without building custom hardware.

Build your FPGA system in minutes and start taking advantage of the powerful FPGA technology.

The pre-verified reference design and tutorial will jump-start your development by demonstrating upstream performance of 350+ MByte/sec on selected hosts.

The kits are delivered with the free versions of the schematics (not including power circuits and decoupling). The host demonstration software, the EZ-USB FX3 user firmware and the FPGA HDL design are provided in source code. FPGA vendor design software and a programming cable are required in order to modify and recompile the FPGA design. The kit is factory firmware flashed and runs out of the box when connected to a Windows XP/Vista/7 based PC with the provided Cypress driver and demonstration software.
 

  

 
     

  Value  
 

The Cypress EZ-USB FX3 device controller provides a low cost and simple to use solution to add USB 3.0 connectivity to FPGA based designs.

The EZ-USB FX3 based solution supports low cost FPGA families without the need for integrated 5.0 Gbps transceivers otherwise needed for FPGA-only USB 3.0 connectivity.

The EZ-USB FX3 based solution frees up costly FPGA logic resources otherwise needed for an integrated USB 3.0 IP core.

The EZ-USB FX3 based solution allows for a simple scheme for FPGA bitstream download and firmware field upgrade.
 

 
  Related Files  
 

Quick Start Guide

User Guide

 
     
 
Related Resources
 
 

Documentation

 

Technical Support

Christoph Glattfelder
 
Address:
1 Technopark Rd.,
Zurich CH 8005,
Switzerland

Phone:
+41 43 343 39 43

Email: info14@enclustra.com

Webpage: www.enclustra.com

 
Contact Partner

Christoph Glattfelder

Address:
1 Technopark Rd.,
Zurich CH 8005,
Switzerland
Phone:
+41 43 343 39 43

Email:
Webpage:
Tools/Kits:

GPIF™ II Designer

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