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CY23EP09: 2.5 V or 3.3 V, 10-220 MHz, Low Jitter, 9-Output Zero Delay Buffer | Cypress Semiconductor

CY23EP09: 2.5 V or 3.3 V, 10-220 MHz, Low Jitter, 9-Output Zero Delay Buffer

Last Updated: 
Dec 14, 2017
Version: 
*G

2.5V or 3.3V, 10-220-MHz, Low Jitter, 9-Output Zero Delay Buffer

Features

  • 10 MHz to 220 MHz maximum operating range
  • Zero input-output propagation delay, adjustable by loading on CLKOUT pin
  • Multiple low-skew outputs
    • 45 ps typical output-output skew-
    • One input drives nine outputs, grouped as 4 + 4 + 1
  • 25 ps typical cycle-to-cycle jitter
  • 15 ps typical period jitter
  • Standard and High drive strength options
  • Available in space-saving 16-pin 150-mil small outline integrated circuit (SOIC) or 4.4-mm thin shrunk small outline package (TSSOP) packages
  • 3.3V or 2.5V operation
  • Industrial temperature available

Functional Description

The CY23EP09 is a 2.5 V or 3.3 V zero delay buffer designed to distribute high-speed clocks and is available in a 16-pin SOIC or TSSOP package. The -1H version operates up to 220 (200) MHz frequencies at 3.3 V (2.5 V), and has higher drive than the -1 devices. All parts have on-chip PLLs that lock to an input clock on the REF pin. The phase-locked loop (PLL) feedback is on-chip and is obtained from the CLKOUT pad.