Using Clocks with PSoC 4 | Cypress Semiconductor
Using Clocks with PSoC 4
For those that have used PSoC 3 or PSoC 5LP and are now using PSoC 4, you'll notice that there are some changes between what can be done with clocks on the different devices. There are a few new restrictions and several new capabilities. In this post I'll take a look at using clocks in the UDB array and with pins.
The first change is that clocks can only be used as clocks. They cannot be used as data signals. In PSoC 3 and 5LP this was possible, but discouraged. In PSoC 3 and 5LP the clock signals were available as clocks and also as routed signals. The reason it was discouraged to use them as routed data signals is that the timing of these signals is not guaranteed. That means that setup and hold is not known when a routed clock is used as a data signal and clocked by another clock. With PSoC 4 this discouraged usage is just not allowed. PSoC 4 only has the clocks distributed on the low skew clock lines and those are only connected to clock inputs. As an example the following circuit will generate an error with PSoC 4.
Although this isn't the most useful circuit, what if I really needed to implement this circuit? The solution is to convert the clock signal to a data signal. This is easily done with a toggle flip-flop and a clock signal running 2x faster.
This circuit is perfectly legal. In this case a 4 MHz clock is used instead of a 2 MHz clock. The toggle flip-flop toggles with every 4 MHz clock edge resulting in a data signal that is a perfect square wave at 2 MHz. The resulting signal also has a known timing relationship. Because of that, this is also the circuit that should be used for PSoC 3 and 5LP designs as well.
One common debug application for routed clocks is to send the clock to a pin along with a data signal. This can be done just to observe the clock during debugging. In PSoC 3 and 5LP this is done simply by hooking a clock to an output pin.
This is not allowed on PSoC 4 since clocks can't be used as data signals. However, PSoC 4 has some new pin capabilities and they allow the clock to be sent directly to a pin. In fact there are a bunch of new clocking capabilities for pins. Right now I'll just take a look at the one that allows this function to be implemented with PSoC 4.
This configuration looks a little odd, but it does exactly what is desired. The 12 MHz clock in this case is sent directly to the pin. The clock signal needs to be sent to the out_clk terminal and the output pin terminal is just tied high. To get to this point start with a standard output pin and then change the configuration as shown here:
This causes the output pin to output the clock instead of the data signal. Then make this second configuration change:
This configures the pin to use the clock that is being provided as the out_clk as the output clock signal for the pin.
With those changes and the signal connections shown the clock signal is once again visible on the pin.