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PsoC1 Power Savings Using Sleep Mode | Cypress Semiconductor

PsoC1 Power Savings Using Sleep Mode

The importance of system power consumption management cannot be overstated. The use of PSoC s sleep mode is a simple and efficient way to reduce overall current draw without limiting the functionality. Significant power savings can be realized if attention is given to the proper entry, use, and exit of sleep mode. When implemented in conjunction with other power-saving features and techniques, sleep mode can be extremely effective in reducing  the  overall power consumption in a PSoC-based design. Below are two examples of techniques to reduce the power consumption in sleep mode by disabling PSoC features that may remain active when the SLEEP bit is set.

Disable Analog Block References

PSoC Analog Blocks have individual power-down settings that are controlled by the firmware. The Analog Block References can be disabled  by a  write to the PWR bits [2:0] of the  ARF_CR register, similar to the code below:

ARF_CR &= 0xf8; //Turn off analog reference

Disable CT/SC Blocks

The continuous time (CT) blocks are powered down individually with a write to each ACBxxCRy or ACExxCRy register corresponding to the block s column. The switch capacitor (SC) blocks are similarly controlled by the ASCxxCRy or ASDxxCRy registers. The example below shows how to disable the CT and SC blocks for column zero.

ACB00CR2 &= 0xfc; // Disable CT Block

ASC10CR3 &= 0xfc; // Disable typeC SC block

ASD20CR3 &= 0xfc; // Disable typeD SC block

The CT blocks can remain in operation because they do not require a clock source. However, the SC blocks do not operate because there is no clock source for the switches.

Application Note AN47310 PSoC1 Power Savings Using Sleep Mode provides an overview of PSoC1 sleep mode basics and information on power-saving methods, and other sleep related considerations.

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