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PSoC® 1 - Implementing Hysteresis Comparator | Cypress Semiconductor

PSoC® 1 - Implementing Hysteresis Comparator

The comparator is the most fundamental building block of a mixed-signal design. It is essentially a differential amplifier with an extremely high open loop gain. In order to improve the stability of the output with noisy inputs, hysteresis is used in the design, by creating two thresholds - one threshold for the output to switch from low to high and another for the output to switch from high to low.

Hysteresis comparator in PSoC1 can be implemented using either of the following types of analog blocks:

1.    Continuous time (CT) analog block

2.    Switched capacitor (SC) analog block

The CT block in PSoC1 includes an opamp and a resistor array. This makes the analog block useful for functions such as programmable gain amplifier (PGA) and comparators. The SC block of PSoC1 includes an opamp with a switched capacitor network around it. This architecture is useful in the design of integrator, differentiator, filter, amplifier, DAC and comparator.

Hysteresis Comparator using SC Block

The COMP user module in PSoC Designer can be used to design hysteresis comparators using the CT block. It is also possible to make an SC block comparator with the hysteresis. The SC block comparator s threshold level is determined by the ratio of two internal capacitors. This produces a comparator with the hysteresis that:

  • Has no external components
  • Allows the hysteresis thresholds to be easily changed in firmware

Figure below shows an SC block configured as a programmable threshold comparator.

 

AN2108 PSoC1 Impementing Hysteresis Comparators describes a detailed example to show how SC blocks can be used for such a design in PSoC1. In addition, two other design examples are also shown, along with commented firmware projects:

Design 1 shows a hysteresis comparator implementation using a CT block and external resistors. This architecture allows precise setting of the hysteresis.

Design 2 shows a unique technique to implement a comparator with independently controllable hysteresis thresholds.

Please access the application note webpage to download the document and zip file containing the example projects. 

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