PSoC 1 ADCs – The Five Golden Rules | Cypress Semiconductor
PSoC 1 ADCs – The Five Golden Rules
Most if not all of the microcontroller designs that involve analog signal processing will require an ADC to convert an analog signal into a digital value that can be processed by the CPU. PSoC 1 has a vast selection of ADCs that can be used depending on the application, ADCINC, ADCINCVR, ADCINC14, DELSIG8, DELSIG11, DelSig to name a few. Most of the users, beginners to experts face some or other problem while using an ADC like ADC not completing the conversion, ADC result always zero, ADC result incorrect etc. Below are Five Golden Rules that will help you to tame the PSoC 1 ™ ADC.
A PSoC 1 ADC is a combination of analog and digital blocks and the CPU. An SC block configured as a modulator converts the input analog signal into a digital bit stream. A counter is used to count the time the bit stream is high for a given period of integration time. A timer or a PWM is used to set the integration time. At the end of integration cycle, the timer or PWM generates an interrupt and the processor reads the counter inside the interrupt.
When Global Interrupt is disabled, the CPU will not respond to the timer’s (or PWM’s) interrupt to read the ADC result. So, the ADC would never complete the conversion. Any instruction, for example,
while(ADC_fIsDataAvailable() == 0);
that waits for the ADC result to complete will execute forever
Golden Rule No.1 – Always enable Global Interrupt
The Analog power parameter under the Global Resources sets the power to the SC blocks and the reference.
For the ADC to work correctly, always select the power settings “SC On / Ref Low”, “SC On / Ref Medium” or “SC On / Ref High”. Selecting a reference with “SC Off” or “All Off” will result in the ADC not working.
The Reference power should be selected so that the Reference Generator is able to provide adequate power to the Analog blocks. The power to the Reference section should always be equal to or greater than the highest power used by any analog block in the design. For example, if you have a PGA and an ADC where the PGA operates at Low power and the ADC at Medium power, the Reference power should be set to SC On / Ref Medium or SC On / Ref High.
Golden Rule No.2 – Always provide power to SC Blocks and set appropriate Reference Power.
COLUMN CLOCK AND DATA CLOCK
The ADC has a parameter called “Clock”. This selects the clock source to the Digital section of the ADC. The column clock for the SC Block should be set to the same value as that of the “Clock” parameter. In the picture below, the Clock parameter is set to VC2. So, the Analog Column clock should also be set to VC2. If the Column clock and Data clock are not the same, the output of the ADC will not be correct.
Golden Rule-3: The Data Clock and Column Clock should always be equal
The output of Switch Capacitor blocks is not a continuous signal. SC blocks have two phases of operation. Phase-1 is the charge acquisition phase when the input signal is sampled. During this phase, the output of the SC block is 0. Phase-2 is the charge transfer phase when the acquired charge is transferred to the output and the output is proportional to the ratio of input and output switch capacitor cell values. So, the output of the SC block is valid only during Phase-2. Application Note “AN2041 - Understanding Switched Capacitor Blocks” is a very good source of information on this subject.
If an ADC’s input is connected to the output of another SC Block, say a 3 Op-Amp Instrumentation Amplifier or a Filter, the output of this source SC block is 0 during Phase-1 of the SC Block operation. The ADC modulator which is also an SC Block samples the input signal on Phase-1. Because of this, the ADC will always see 0V at its input and will always produce an output of 0. Under this circumstance, the ClockPhase parameter of the ADC should be set to “Swapped”. Now, the ADC modulator will sample its input on Phase-2 of the SC Block cycle when the input is valid. This will produce the correct ADC result. If the input to the ADC is a continuous signal from a CT block, the Analog bus or a direct pin, then the ClockPhase parameter can be set to either “Normal” or “Swapped”
Golden Rule-4: Always set the correct value for the ClockPhase parameter
WAITING FOR THE RESULT INSIDE AN ISR
Many a time, you may want to initiate an ADC conversion inside the ISR of another user module, say a timer or counter and process the output of the ADC inside the ISR. The code may look like this:
void TimerISR (void) // This is an ISR
while(ADC_fIsDataAvailable() == 0;
Result = ADC_iGetDataClearFlag();
The above code will result in the program stuck in the while loop waiting for the ADC result to be available.
When an ISR is entered, the Global Interrupt is disabled and is enabled only when the ISR exits. So, inside an ISR no other interrupts will be serviced. The ADC requires the interrupt to work for its conversion to be completed. As the ADC interrupts will not be serviced inside the TimerISR, the ADC conversion would never complete. Re-enabling Global interrupt inside the ISR would be a solution. But this is not preferable as this could also result in nested interrupts locking the CPU inside ISRs forever.
So, do not wait for an ADC result to be available inside another ISR. Instead set some flag inside the ISR and do the ADC conversion in the foreground.
Golden Rule-5: Never wait for the ADC result inside an ISR
Follow the above five Golden Rules and see the PSoC 1 ADCs work happily for you!!