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Measuring a Negative Voltage Using PSoC1 | Cypress Semiconductor

Measuring a Negative Voltage Using PSoC1

One of the most common questions I come across is “How do I measure a negative voltage using PSoC?”  For example, I have a +1V signal that I need to measure using PSoC ADC.  But the PSoC will not take any voltage below VSS.  How do I measure the negative portion of the input signal? 

The solution depends on the answer to two questions. 

Is the signal ground isolated from PSoC ground (VSS)? 
Is the signal AC or DC?

Signal Ground Isolated from PSoC Ground

If the signal ground is isolated from VSS of PSoC, then for both AC and DC input signals, the solution is simple and same.  Bring out AGND to an external pin and then feed the signal with respective to this AGND.

In the schematic above, the internal AGND is brought out on P0[5] using the Analog buffer and the signal is connected between this AGND and the PSoC input.  Set the reference of the PGA (if you are using a PGA to amplify the signal) to AGND and the DataFormat of the ADC to “Signed” and the PSoC is now ready to measure a –ve signal.
More about bringing out AGND to an external pin can be found in the below article.

Bring out AGND to an external pin

Signal Ground is Same as PSoC Ground – AC signal

If the signal ground is same as VSS, and if the input signal is AC, then the signal reference can be shifted from VSS to AGND by using a capacitor and a resistor.

In the above schematic, AGND is brought out to P0[5].  The signal to be measured is connected to the PSoC input through capacitor “C” and the PSoC input is biased to AGND by resistor “R”.  C and R form a high pass filter and hence should be selected in such a way that the input signal is passed without attenuation.  Set reference of the PGA to AGND and DataFormat of ADC to Signed.

Signal Ground is Same as PSoC Ground – DC Signal

When the input signal is DC and the signal ground is same as VSS, then the input can be shifted to AGND by biasing the input to VREFHI.

In the above circuit, the input signal is connected to the PSoC input through resistor R1, and the input of the PSoC is biased to VREFHI using R2.  VREFHI can be brought out to a pin the same way as AGND is brought out, either by using the RefMux user module, or by writing to the ACBxxCR2 register. 

With this circuit, the input signal will be lifted to AGND and attenuated by a factor of 2.  This method works for references that have VSS as REFLO, ie (Vbg + Vbg), (Vdd/2 + Vdd/2) and (1.6Vbg + 1.6Vbg). 

For example, for a reference of (Vbg + Vbg), the Analog Ground is at 1.3V and VREFHI is at 2.6V.  For a +1V input, following are the voltage levels on the input of PSoC for various input signal voltage levels.

Vsignal V on P0[1] w.r.t AGND
-1V 0.8V -0.5V
0V 1.3V 0V
+1V 1.8V +0.5V

From the above table, it is clear that the input signal gets shifted to 1.3V (AGND) and is attenuated by a factor of 2.  One side effect of this method is the difference between the shift created by the resistor network and the internal AGND will be amplified by the PGA.  But this can be compensated in firmware.

Depending on the type of input signal and isolation between signal and PSoC grounds, one of the above methods may be used to measure a –ve signal using PSoC.

 

Comments

passos_well's picture

What is the voltage range I can put on the PSOC in this configuration?

graa's picture

The signal on the PSoC input pin after the biasing should be within VSS and VDD. That is the limit for the input signal.

Deepak_Aagri's picture

if i have to calculate value from 0 to -5v.

jordanss123 jordanss123's picture

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