Matt’s Tips – Advanced Debugging: Using CoreSight(TM) Trace with PSoC 5LP | Cypress Semiconductor
Matt’s Tips – Advanced Debugging: Using CoreSight(TM) Trace with PSoC 5LP
Interested in doing some more sophisticated debugging of your PSoC 5LP design? Take a gander at Knowledge Base Article 90952 at the link below.
But this is not your father’s trace – which required expensive hardware and hours of set-up time – because the PSoC 5LP devices are built around the ARM® Cortex®-M3 processor core, which includes the full range of valuable CoreSightTM Trace features.
- Periodic PC Sampling for a coarse record of program flow
- Single pin diagnostic output (“printf-style”)
- CPU event capture for software profiling
- Timestamps of trace captures
- Exception/interrupt trace recording handler entry and exit
- Data memory trace
The easiest-to-use trace feature is Serial Wire Trace Output (SWO), which forwards the above trace data through a single pin. Most commercial debugger probes, such as ARM’s ULINK2, IAR’s iJet and the Segger J-LINK, support this interface and the Serial Wire Viewer (SWV) features are seamlessly integrated into the Keil μVision or IAR Embedded Workbench IDEs. SWO is a great way to get a better understanding of what your program is really doing because it exposes bottlenecks in the code, and helps you measure interrupt overhead.
If you need a little more detail, in particular streaming trace of executed instructions, you access the Embedded Trace Macrocell (ETM) through 1-to-4-Pin Synchronous Trace Output (TPIU) or the Embedded Trace Buffer (ETB). The former is a means of streaming the data off-chip through a more sophisticated debugger device such as the ARM ULINK-Pro, IAR iJet-TRACE and the Segger J-TRACE. The latter is an on-chip buffer for the trace data that allows post-execution access to the data through the SWD debug port rather TPIU pins. In addition to tracing every instruction and streaming it to your debugger, ETM enables run-time control of trace capture. This enables you to trigger the tracing on/off in specific sections of code, or on data accesses, to quickly home in on coding errors such as runaway pointers, bad memory accesses, and so on.
Whichever trace method you choose, it is a great way to augment your usual breakpoint and stepping debug "arsenal" and, with the CoreSight features included in all PSoC 5LP devices, it won’t take long to master the techniques and reduce your debugging time.
Many thanks to Mark Saunders (go Arsenal) for tackling the particularly tough bits in this post.
--Matt Landrum (email@example.com)