Guided Pin Selection in PSoC Creator 3.3 | Cypress Semiconductor
Guided Pin Selection in PSoC Creator 3.3
Have you ever used a microcontroller that restricts your choices of pins for every peripheral on the device? Have you ever found that you cannot set up your ADC the way you need it because it shares pins with another important peripheral? Have you even been forced to compromise the elegance of your solution just to make it “fit” into the device? At Cypress we hate stories like that!
The good news is that, since you are already reading this blog, you probably already know that PSoC devices offer plenty of flexible routing on-chip. Flexible routing almost eliminates the constraints on your pin choices, making it is possible to create the perfect pin-out for your board while utilizing the maximum possible functionality on your chosen device.
The new Guided Pin Selection feature in PSoC Creator 3.3 makes it really quick and easy to realize these benefits. The re-vamped pin editor helps you find the perfect pin allocation in three ways.
- Stops you from selecting pins that cannot support the functionality of the peripheral
- Warns you about inefficient selections (i.e. pin connections that work just fine but consume routing resources than you might want to use for other functions)
- Updates dynamically as selections are made that impact the available choices for the remaining pins
The editor displays pin suitability with an intuitive color-coding scheme (green pins are ideal choices, yellow pins are legal choices but consume more than the minimum routing resources, gray are not usable at all, and red are bad connections) that eliminates the trial and error process you may have endured with other microcontrollers.
The combination of flexible routing and guided pin selection removes the iterative and error-strewn nature of pin selection and ensures that figuring out which pins to use for a given peripheral need never be a problem again.