Silicon Errata for 65 - nm Asynchronous SRAM Device CY62167G

Silicon Errata for 65-nm Asynchronous SRAM Device CY62167G

Last Updated: 04/15/2013


Version: *A
This document describes the errata for the 16 Mbit Asynchronous MoBL SRAM CY62167G in 65-nm process technology. Details include errata trigger conditions, scope of impact, available workarounds, and silicon revision applicability. Compare this document to the device’s datasheet for a complete functional description.

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Related Files

File Title	Language	File Size	Last Updated
Errata_CY62167G.pdf	English	87 KB	04/15/2013

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Spec No: 001-87036; Sunset Owner: AJU; Secondary Owner: SXT; Sunset Date: 09/07/13

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