72-Mbit QDR® II+ SRAM Two-Word Burst Architecture with RadStop™ Technology
Features
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Separate independent read and write data ports
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Supports concurrent transactions
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250-MHz clock for high bandwidth
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2-word burst on all accesses
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Double data rate (DDR) interfaces on both read and write ports at 250 MHz (data transferred at 500 MHz)
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Two input clocks (K and K) for precise DDR timing
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SRAM uses rising edges only
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Echo clocks (CQ and CQ) simplify data capture in high speed systems
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Single multiplexed address input bus latches address inputs for both read and write ports
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Separate port selects for depth expansion
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For more, see pdf
Functional Description
The CYRS1542AV18 and CYRS1544AV18 are synchronous pipelined SRAMs, equipped with 1.8-V QDR II+ architecture with RadStop™ technology. Cypress’s state-of-the-art RadStop Technology is radiation hardened through proprietary design and process hardening techniques.
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