CYF0018V/CYF0036V/CYF0072V/CYF2072V: Silicon Errata for the 18 Mbit, 36 Mbit, and 72 Mbit Programmable FIFO

Home > Documentation > Errata

CYF0018V/CYF0036V/CYF0072V/CYF2072V: Silicon Errata for the 18 Mbit, 36 Mbit, and 72 Mbit Programmable FIFO

Last Updated: 12/21/2012


Version: *A
This document describes the errata for the 18 Mbit, 36 Mbit, and 72 Mbit programmable FIFOs. Details include errata trigger conditions, scope of impact, available workarounds, and silicon revision applicability. Compare this document to the device’s datasheet for a complete functional description.

这些文档仅供参考。赛普拉斯、赛普拉斯管理层、雇员及分销商对翻译错误不承担任何责任。当您在设计开发过程中使用这些文档时，我们强烈建议您参照英文版本。

これらの文献はあくまでもご参考のためのみに日本語翻訳されています。誤訳によるトラブルが発生した場合、Cypress Semiconductor Corp. 全ての子会社、関連会社、役員、従業員、販売代理店は一切の責任を負いかねます。最新の英語版オリジナル文献を必ずご参照いただくことをお勧め致します。

Related Files

File Title	Language	File Size	Last Updated
Silicon Errata for 18 Mbit, 36 Mbit, 72 Mbit Programmable FIFO.pdf	English	83 KB	12/21/2012

Need help? Ask a question and find answers in the Cypress Developer Community Forums.

Low/intermittent bandwidth users tip: Firefox and Chrome browsers will allow downloads to be resumed if your connection is lost during download.

Spec No: 001-85158; Sunset Owner: ADMU; Secondary Owner: ADMU; Sunset Date: 06/07/13

	Rate Errata

	Related Pages
	Synchronous

Cypress Perform