Introduction
Because of the increasing speed of CPUs, parallel NOR Flash devices often are too slow to “execute in place” (XIP) program code stored in them. However, SRAMs offer access times below 10 ns. As a result, you often must “shadow” code stored in Flash into the RAM; that is, code must be copied from Flash into RAM before execution, so that the CPU may access it at full speed. In compact board designs where PCB form factor is fixed, the two-chip solution becomes difficult to implement because it requires additional board area. The two-chip solution also requires a special bootup subroutine as the system has to configure the memory controllers first, followed by the rest of the bootup sequence, after program code is copied to the SRAM from the Flash memory. Cypress nvSRAM offers a simple and compact solution because it combines high-speed random access with non-volatility in a single chip.
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