AN74875 - Designing with Serial I2C nvSRAM
Last Updated: 05/06/2013
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Version: *D
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| Cypress I2C (Inter Integrated Circuit) nvSRAM (non volatile SRAM) is a high-performance nonvolatile serial access memory and offers zero cycle delay write operation with infinite SRAM write endurance. The I2C nvSRAM is a standard I2C slave device and requires an I2C master controller to access it in a system. |
A typical I2C single master-multi slave configuration is shown in the following diagram.
This application note provides a few example circuits, design guidelines, and PSoC®3 based sample code snippets to help users understand and design with Cypress I2C nvSRAM.
An "I2C nvRAM" component library is also created using Cypress PSoC®3 device as a reference design project and attached to this Application Note. The PSoC®3 component library configures Cypress PSoC®3 device as a standard I2C master controller and also provides the list of APIs which can directly be called in an application firmware to access the I2C nvSRAM functions.
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これらの文献はあくまでもご参考のためのみに日本語翻訳されています。誤訳によるトラブルが発生した場合、Cypress Semiconductor Corp. 全ての子会社、関連会社、役員、従業員、販売代理店は一切の責任を負いかねます。
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Related Application Notes:
Domain Tags: Serial, I2C, Non Volatile Memories, non-RTC, RTC
Related Knowledge Base: Autostore, HSB, I2C, nvSRAM, RTC, Serial, Vcap, INT, RECALL
Spec No: 001-74875;
Sunset Owner: ZSK;
Secondary Owner: PSR;
Sunset Date: 08/22/12
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