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AN72332 - Guidelines on System Design using Cypress' USB 2.0 Hub (HX2VL)

Last Updated: 01/02/2013
Version: *D

This application note was previously titled "HX2VL (CY7C65642, CY7C65632/34) PCB Design Recommendations"

AN72332 provides guidelines on system design with HX2VL, a high-performance, low-power USB 2.0 high speed hub that is optimized for low-cost designs. Recommended system design and PCB Layout techniques are included here to ensure best performance and full compliance with USB 2.0 specification.

Introduction

HX2VL is the next-generation family of high-performance, low-power USB 2.0 hub controllers. The HX2VL has integrated upstream and downstream transceivers, a USB serial interface engine (SIE), USB hub control and repeater logic, and transaction translator (TT) logic. The HX2VL portfolio has Single-TT and Multi-TT versions, lowcost options with high performance.


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これらの文献はあくまでもご参考のためのみに日本語翻訳されています。誤訳によるトラブルが発生した場合、Cypress Semiconductor Corp. 全ての子会社、関連会社、役員、従業員、販売代理店は一切の責任を負いかねます。 最新の英語版オリジナル文献を必ずご参照いただくことをお勧め致します。




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Spec No: 001-72332; Sunset Owner: PRVE; Secondary Owner: HBM; Sunset Date: 03/30/12

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