Cypress Perform

Home > Documentation > Application Notes
AN46712 - Interfacing to the West Bridge® Astoria™ Pseudo-NAND Processor Port

Last Updated: 08/14/2012
Version: *B

West Bridge® Astoria™ has a robust feature that enables interfacing with a system processor using a standard NAND interface and common NAND flash commands. This feature allows Astoria to emulate a NAND flash device, which enables a system processor to boot from Astoria. This application note describes how to interface a system processor to the Pseudo-NAND interface of Astoria.

这些文档仅供参考。赛普拉斯、赛普拉斯管理层、雇员及分销商对翻译错误不承担任何责任。当您在设计开发过程中使用这些文档时，我们强烈建议您参照英文版本。

これらの文献はあくまでもご参考のためのみに日本語翻訳されています。誤訳によるトラブルが発生した場合、Cypress Semiconductor Corp. 全ての子会社、関連会社、役員、従業員、販売代理店は一切の責任を負いかねます。 最新の英語版オリジナル文献を必ずご参照いただくことをお勧め致します。




Related Files

    File Title Language File Size Last Updated
      AN46712.pdf English 364 KB 05/04/2012
    Need help? Ask a question and find answers in the Cypress Developer Community Forums.

    Low/intermittent bandwidth users tip: Firefox and Chrome browsers will allow downloads to be resumed if your connection is lost during download.


Related Documentation


Spec No: 001-46712; Sunset Owner: SIRK; Secondary Owner: HBM; Sunset Date: 01/25/12
Rate Application ..

Related Documentation

Related Pages