512-Kbit (64 K × 8) SPI nvSRAM
Features
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512-Kbit nonvolatile static random access memory (nvSRAM) internally organized as 64 K × 8
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STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using SPI instruction (Software STORE) or HSB pin (Hardware STORE)
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RECALL to SRAM initiated on power-up (Power-Up RECALL) or by SPI instruction (Software RECALL)
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Support automatic STORE on power-down with a small capacitor (except for CY14X512Q1A)
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High reliability
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Infinite read, write, and RECALL cycles
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1 million STORE cycles to QuantumTrap
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Data retention: 20 years at 85 °C
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For more, see pdf
Functional Overview
The Cypress CY14X512Q combines a 512-Kbit nvSRAM with a nonvolatile element in each memory cell with serial SPI interface. The memory is organized as 64 K words of 8 bits each. The embedded nonvolatile elements incorporate the QuantumTrap technology, creating the world’s most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while the QuantumTrap cells provide highly reliable nonvolatile storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place automatically at power-down (except for CY14X512Q1A). On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation). You can also initiate the STORE and RECALL operations through SPI instruction.
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