Haptics Enabled CapSense® Controller
Features
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1.71-V to 5.5-V operating range
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Low power CapSense® block
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Powerful Harvard-architecture processor
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Flexible on-chip memory
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Precision, programmable clocking
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Programmable pin configurations
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Integrates Immersion TS2000 Haptics technology for ERM drive control
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Versatile analog mux
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Additional system resources
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Complete development tools
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Package options
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For more, see pdf
PSoC® Functional Overview
The PSoC family consists of on-chip controller devices, which are designed to replace multiple traditional microcontroller unit (MCU)-based components with one, low-cost single-chip programmable component. A PSoC device includes configurable analog and digital blocks, and programmable interconnect. This architecture allows the user to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast CPU, flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts.
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