AN66311 - Timing Recommendations for Byte Enables and Chip Enables in MoBL® SRAMs
Last Updated: 04/01/2013
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Version: *D
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| AN66311 provides timing recommendations for the use of byte enable pins (BHE and BLE) and chip enables (single or dual, as applicable) in select Cypress MoBL® SRAMs with a date code before 2011. |
Cypress devices with newer date code do not require you to implement these timing recommendations in your design. The issue responsible for the recommendations provided in this document was fixed in 2011. The nature of this fix is transparent to a user.If you were unaffected by this issue earlier, the fix will not affect you either. This fix does not affect any of the datasheet parameters or functionality of the devices.
The rest of this document describes the timing recommendations for byte enable pins and chip enables for Cypress MoBL SRAM devices from old inventory. If you have any queries about the content in this document, please contact us at www.cypress.com/support.
Note that you must read the datasheet before implementing the timing recommendations mentioned in this document.
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これらの文献はあくまでもご参考のためのみに日本語翻訳されています。誤訳によるトラブルが発生した場合、Cypress Semiconductor Corp. 全ての子会社、関連会社、役員、従業員、販売代理店は一切の責任を負いかねます。
最新の英語版オリジナル文献を必ずご参照いただくことをお勧め致します。
Related Application Notes:
Domain Tags: Volatile Memories, Async
Related Knowledge Base: SRAM, Timing, BHE / BLE, Async, uPower, MoBL
Spec No: 001-66311;
Sunset Owner: NILE;
Secondary Owner: AJU;
Sunset Date: 07/12/11
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