AN64574 - Designing with Serial Peripheral Interface (SPI) nvSRAM
Last Updated: 09/25/2012
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Version: *E
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| Cypress's serial peripheral interface (SPI) nvSRAM is a high-performance nonvolatile serial memory that offers zero cycle delay write operation and infinite SRAM write endurance. |
The SPI nvSRAM is a slave SPI device and requires an SPI master controller to access nvSRAM in a system. This application note provides a few key design considerations and firmware tips to guide the users designing with SPI nvSRAM. An associated project for PSoC® 1 and a library component for PSoC 3 are also provided as an example project, which demonstrates SPI nvSRAM access by a standard SPI master controller.
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Related Application Notes:
Domain Tags: Serial, SPI, Non Volatile Memories, non-RTC, RTC
Related Knowledge Base: Autostore, HSB, nvSRAM, RTC, Serial, SPI, Vcap, INT, RECALL, HOLD
Spec No: 001-64574;
Sunset Owner: ZSK;
Secondary Owner: PSR;
Sunset Date: 06/13/11
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