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Direct Memory Access (DMA) 1.70

Last Updated: 12/26/2012
Version: 1.70
PSoC Creator Component Data Sheet

Features

  • 24 channels
  • Eight priority levels
  • 128 Transaction Descriptors (TDs)
  • 8-, 16-, and 32-bit data transfers
  • Configurable source and destination addresses
  • Support for endian compatibility
  • Can generate an interrupt when data transfer is complete
  • DMA Wizard to assist with application development
 Symbol Diagram

General Description

The DMA component allows data transfers to and from memory, components, and registers. The controller supports 8-, 16-, and 32-bit wide data transfers, and can be configured to transfer data between a source and destination that have different endianess. TDs can be chained together for complex operations.

Required Software: PSoC Creator v1.0 Beta 5 and above

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Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.




Related Files

    File Title Language File Size Last Updated
      CyDMA_V_1.70 English 428 KB 12/26/2012
      CyDMA_V_1.60 English 344 KB 09/10/2012
      CyDMA_V_1.50 English 300 KB 06/21/2012
      CyDMA_V_1.50 Chinese 407 KB 06/21/2012
      CyDMA_V_1.50 Japanese 522 KB 06/21/2012
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Spec No: 001-84992; Sunset Owner: HMI; Secondary Owner: POA; Sunset Date: 10/15/11
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