Powerline Communication Solution
Features
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Integrated Powerline Modem PHY
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2400 bps Frequency Shift Keying Modulation
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Powerline Optimized Network Protocol
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Integrates Data Link, Transport, and Network Layers
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Supports Bidirectional Half-Duplex Communication
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8-bit CRC Error Detection to Minimize Data Loss
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I2C enabled Powerline Application Layer
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Supports I2C Frequencies of 50, 100, and 400 kHz
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Reference Designs for 110V to 240V AC, 12V to 24V AC/DC Powerlines
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Reference Designs Comply with CENELEC EN50065-1:2001 and FCC Part 15
Functional Overview
The CY8CPLC10 is an integrated Powerline Communication chip with the Powerline Modem PHY and Powerline Network Protocol Stack. This chip provides robust communication between different nodes on a Powerline.
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