User Module Datasheet: 16-Bit Counter Datasheet Counter16 V 2.5 (CY8C29/27/24/22/21xxx, CY8C23x33, CYWUSB6953, CY7C64215, CY8CLED02/04/08/16, CY8CLED0xD, CY8CLED0xG, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8C21x45, CY8C22x45, CY8CTMA30xx, CY8C28x45, CY8CPLC20, CY8CLED16P01, CY8CTMA140)
Last Updated: 10/22/2012
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Version: 2.5
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Features and Overview
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The 16-bit general purpose counter uses two PSoC blocks
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Source clock rates up to 48 MHz
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Automatic reload of period on terminal count
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Programmable pulse width
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Input enables/disables continuous counter operation
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Interrupt option on compare output or terminal count
The 16-bit Counter User Modules provide a down counter with a programmable period and pulse width. The clock and enable signals can be selected from any system time base or external source. Once started, the counter operates continuously and reloads its internal value from the period register upon reaching terminal count. During each clock cycle, the counter compares the current count to the value stored in the compare register. Each clock cycle, the Counter tests the count against the value of the compare register for either a “less than” or “less than or equal to” condition. The comparator output provides a logic level that may be routed to pins and to other user modules. Most PSoC device families also permit the terminal count output to be routed in the same manner. If your device has this ability, it is shown in the device editor. An interrupt can be programmed to trigger when the counter reaches the terminal count or when the comparator (primary) output is asserted.
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Spec No: 001-13263;
Sunset Owner: YURI;
Secondary Owner: LHO;
Sunset Date: 08/01/11
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