User Module Datasheet: 32-Bit Timer Datasheet Timer32 V 2.6 (CY8C29/27/24/22/21xxx, CY8C23x33, CYWUSB6953, CY7C64215, CY8CLED02/04/08/16, CY8CLED0xD, CY8CLED0xG, CY8CTST110, CY8CTMG110, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8CTMA140, CY8C21x45, CY8CTMA30xx, CY8C28x45, CY8CPLC20, CY8CLED16P01, CY8C28xxx)
Last Updated: 02/22/2013
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Version: 2.6
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Features and Overview
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32-bit general purpose timer uses four PSoC blocks
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Source clock rates up to 48 MHz
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Automatic reload of period on terminal count
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Capture for clocks up to 24 MHz.
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Terminal count output pulse may be used as input clock for other analog and digital functions
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Interrupt option on terminal count, capture (on some devices), or when counter reaches a preset value
The 32-bit Timer User Module provides a down counter with programmable period and capture ability. The clock and enable signals can be selected from any system time base or external source. Once started, the timer operates continuously and reloads its internal value from the period register upon reaching terminal count. The output pulses high in the clock cycle following terminal count. Events can capture the current Timer count value by asserting the edge-sensitive capture input signal. Each clock cycle, the Timer tests the count against the value of the compare register for either a “Less Than" or “Less Than or Equal To" condition. Interrupts may be generated based on terminal count and compare signals. Some device families offer two additional features. The interrupt options include “interrupt on capture" and, in addition, the compare signal may be routed onto the row buses. If these options are available on your chosen device they will be shown in the Device Editor.
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Spec No: 001-13624;
Sunset Owner: YURI;
Secondary Owner: LHO;
Sunset Date: 10/07/11
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